Article

SEMICON West Commentary: "Back-End Executive Outlook"

Elvino da Silveira President and CEO, Azores Corp.

Wafer-level packaging (WLP) is becoming more prevalent in the semiconductor packaging industry, fueled by the increasing prominence of area array devices in electronics manufacturing. Traditional wafer bumping processes have been based on stencil printing techniques or digitally driven jetting technologies. However, there are significant limitations to these processes, the most important being limitations on bump size within the parameters of precision and repeatability.

With current feature size requirements shrinking, wafer bumping can best be accomplished by either a photolithography stepper or proximity mask aligner. A key factor in this decision is the financial capabilities of the manufacturer and the relative process/cost benefits of photolithography. To make this decision, manufacturers must weigh the relative performance capabilities, throughput, and process flexibility of photolithography.